1. Field of the Invention
The present invention relates to a technology that enables consideration of an early pin assignment by using a package-designing CAD apparatus in designing a printed circuit board including a PLD component.
2. Description of the Related Art
In designing a printed circuit board including a PLD component such as Field Programmable Gate Array (FPGA), a PLD designer, a circuit designer, and a package designer exchange design information such as pin assignment information.
A PLD-designing CAD apparatus for supporting PLD designing, a circuit-designing CAD apparatus for supporting circuit designing, and a package-designing CAD apparatus for supporting package designing respectively hold design information, and thus it is important to maintain a consistency among the design information held by each of the apparatuses. Therefore, for example, when pin assignment is changed in package designing, the change needs to be reflected in PLD design information.
Consequently, a technology has been developed in which pin replacement in package designing is reflected in PLD design information. For example, Japanese Patent Application Laid-Open No. 2006-79447 discloses an FPGA design supporting apparatus in which information on changed pin layout can be reflected in FPGA design information.
However, there is a problem that a component shape type library is required to consider a package design by using the package-designing CAD apparatus, though, there is no component shape type library of the PLD component when the PLD designer and the package designer consider an early pin assignment. Therefore, the package designer cannot consider the pin assignment by using the package-designing CAD apparatus.